cystech electronics corp. spec. no. : c322v3 issued date : 2012.07.18 revised date : page no. : 1/9 MTP2301V3 cystek product specification -20v p-channel enhancement mode mosfet MTP2301V3 bv dss -20v i d -3.4a 79m (typ.) r dson(max) @v gs =-4.5v, i d =-2.8a r dson(max) @v gs =-2.5v, i d =-2a 116m (typ.) features ? advanced trench process technology ? high density cell design for ultra low on resistance ? excellent thermal and electrical capabilities ? compact and low profile tsot-23 package ? pb-free lead plating and halogen-free package equivalent circuit outline MTP2301V3 tsot-23 d s g g gate s source d drain absolute maximum ratings (ta=25 c) parameter symbol limits unit drain-source voltage v ds -20 v gate-source voltage v gs 8 v continuous drain current @t a =25 c, v gs =-4.5v -3.4 continuous drain current @t a =70 c, v gs =-4.5v i d -2.7 pulsed drain current i dm -10 a ta=25 1.38 (note) maximum power dissipation w p d ta=70 0.88 (note) operating junction and storage temp erature range tj ; tstg -55~+150 c
cystech electronics corp. spec. no. : c322v3 issued date : 2012.07.18 revised date : page no. : 2/9 MTP2301V3 cystek product specification thermal performance parameter symbol limit unit thermal resistance, j unction-to-ambient(pcb mounted) rth,ja 90 (note) c/w lead temperature, for 5 second soldering(1/8? from case) t l 260 c note : surface mounted on 1 in 2 fr-4 board with 2 oz. copper, t Q 5sec; 270 c/w when mounted on minimum copper pad. electrical characteristics (ta=25 c) symbol min. typ. max. unit test conditions static bv dss -20 - - v v gs =0, i d =-250a v gs(th) -0.45 - - v v ds =v gs , i d =-250a i gss - - 100 na v gs =8v, v ds =0 i dss - - -1 a v ds =-16v, v gs =0 - 79 100 i d =-2.8a, v gs =-4.5v *r ds(on) - 116 150 m i d =-2a, v gs =-2.5v *g fs - 6.3 - s v ds =-5v, i d =-2.8a dynamic ciss - 446 - coss - 57 - crss - 52 - pf v ds =-10v, v gs =0, f=1mhz t d(on) - 9.2 20 t r - 7.3 60 t d(off) - 38 50 t f - 12 20 ns v dd =-10v, i d =-1a, r l =6 , v gen =-4.5v, r g =6 qg - 3 10 qgs - 0.8 - qgd - 1.1 - nc v ds =-10v, i d =-3a, v gs =-2.5v, source-drain diode i s - - -1.6 a - v sd - -0.86 -1.2 v v gs =0v, i s =-1.6a trr* - 30 - ns qrr* - 25 - nc i f =-3a, di f /dt=100a/ s *pulse test : pulse width 300s, duty cycle 2% ordering information device package shipping marking MTP2301V3 tsot-23 (pb-free lead plating an d halogen-free package) 3000 pcs / tape & reel 01
cystech electronics corp. spec. no. : c322v3 issued date : 2012.07.18 revised date : page no. : 3/9 MTP2301V3 cystek product specification typical characteristics typical output characteristics 0 5 10 15 20 25 012345 -v ds , drain-source voltage(v) -i d , drain current (a) -v gs =5v - v gs = 2v -v gs =3v -v gs =4v -v gs =1v brekdown voltage vs ambient temperature 15 20 25 30 -75 -50 -25 0 25 50 75 100 125 150 175 tj, junction temperature(c) -bv dss , drain-source breakdown voltage (v) i d =-250 a, v gs =0v static drain-source on-state resistance vs drain current 10 100 1000 0.01 0.1 1 10 -i d , drain current(a) r ds(on) , static drain-source on-state resistance(m) -v gs =1.5v -v gs =4.5v -v gs =2.5v -v gs =2v reverse drain current vs source-drain voltage 0.2 0.4 0.6 0.8 1 1.2 024681 -i dr , reverse drain current (a) -v sd , source-drain voltage(v) 0 tj=25c tj=150c v gs =0v static drain-source on-state resistance vs gate-source voltage 40 80 120 160 200 240 280 320 360 400 012345 -v gs , gate-source voltage(v) r ds( on) , static drain-source on- state resistance(m) i d =-2.8a drain-source on-state resistance vs junction tempearture 20 40 60 80 100 120 -60 -20 20 60 100 140 180 tj, junction temperature(c) r ds( on) , static drain-source on-state resistance(m) v gs =-4.5v, i d =-2.8a
cystech electronics corp. spec. no. : c322v3 issued date : 2012.07.18 revised date : page no. : 4/9 MTP2301V3 cystek product specification typical characteristics(cont.) capacitance vs drain-to-source voltage 10 100 1000 0.1 1 10 100 -v ds , drain-source voltage(v) capacitance---(pf) c oss ciss crss threshold voltage vs junction tempearture 0.2 0.4 0.6 0.8 1 -60 -40 -20 0 20 40 60 80 100 120 140 160 tj, junction temperature(c) -v gs( th) ,threshold voltage-(v) i d =-250 a i d =-1ma single pulse power rating, junction to ambient (note 1 on page 2) 0 10 20 30 40 50 0.001 0.01 0.1 1 10 100 pulse width(s) power (w) t j( max) =150c t a =25c gate charge characteristics 0 1 2 3 4 5 0246 qg, total gate charge(nc) -v gs , gate-source voltage(v) 8 v ds =-10v i d =-3a maximum safe operating area 0.01 0.1 1 10 100 0.01 0.1 1 10 100 -v ds , drain-source voltage(v) -i d , drain current (a) dc 10ms 100ms 1ms 100 s 10 s t a =25c, tj=150c, v gs =-4.5v, r ja =90c/w single pulse maximum drain current vs junctiontemperature 0 0.5 1 1.5 2 2.5 3 3.5 4 25 50 75 100 125 150 175 tj, junction temperature(c) -i d , maximum drain current(a) t a =25c, v gs =-10v
cystech electronics corp. spec. no. : c322v3 issued date : 2012.07.18 revised date : page no. : 5/9 MTP2301V3 cystek product specification typical characteristics(cont.) typical transfer characteristics 0 5 10 15 20 25 30 0123456 -v gs , gate-source voltage(v) -i d , drain current (a) -v ds =5v power derating curve 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 0 20 40 60 80 100 120 140 160 t a , ambient temperature() p d , power dissipation(w) mounted on fr-4 board with 1 in 2 p ad area transient thermal response curves 0.01 0.1 1 1.e-04 1.e-03 1.e-02 1.e-01 1.e+00 1.e+01 1.e+02 t 1 , square wave pulse duration(s) normalized transient thermal resistance single pulse 0.01 0.02 0.05 0.1 0.2 d=0.5 1.r ja (t)=r(t)*r ja 2.duty factor, d=t 1 /t 2 3.t jm -t c =p dm *z jc (t) 4.r ja =90 c/w
cystech electronics corp. spec. no. : c322v3 issued date : 2012.07.18 revised date : page no. : 6/9 MTP2301V3 cystek product specification reel dimension
cystech electronics corp. spec. no. : c322v3 issued date : 2012.07.18 revised date : page no. : 7/9 MTP2301V3 cystek product specification carrier tape dimension
cystech electronics corp. spec. no. : c322v3 issued date : 2012.07.18 revised date : page no. : 8/9 MTP2301V3 cystek product specification recommended wave soldering condition peak temperature soldering time product pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak 10-30 seconds temperature(tp) 20-40 seconds ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of t he package, measured on the package body surface.
cystech electronics corp. spec. no. : c322v3 issued date : 2012.07.18 revised date : page no. : 9/9 MTP2301V3 cystek product specification tsot-23 dimension dim marking: te 3-lead tsot-23 plastic surface mounted package cystek package code: v3 01 xx device code date code style: pin 1.gate 2.source 3.drain inches millimeters inches millimeters min. max. min. max. dim min. max. min. max. a 0.028 0.035 0.700 0.900 e 0.063 0.067 1.600 1.700 a1 0.000 0.004 0.000 0.100 e1 0.104 0.116 2.650 2.950 a2 0.028 0.031 0.700 0.800 e 0.037(bsc) 0.95(bsc) b 0.014 0.020 0.350 0.500 e1 0.075(bsc) 1.90(bsc) c 0.003 0.008 0.080 0.020 l 0.012 0.024 0.300 0.600 d 0.111 0.119 2.820 3.020 0 8 0 8 notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing specification or packing method, please c ontact your local cystek sales office. material: ? lead: pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitable for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance .
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